ARM is an intellectual property (IP) company whose assets are its people, patent portfolio, design methods and experience. Focus being design and research development, greater store is given on creation of ideas and technical methods. The combination of Artisan's digital, analog and high-bandwidth connectivity products with ARM's 16/32-bit RISC processors. Data engines, peripherals, software provides a total system solution that offers a fast, reliable path to market for leading electronics companies. The huge number of customer base and their success with high volume chip production using our highly differentiated memory generators, standard cell and I/O cell libraries speak volumes on our product quality and ease-of-use. With our continued success, ARM Embedded Technologies Private Limited is now expanding both Physical IP and ARM core products organizations in Bangalore.

1. Memory Design (Code: MEMD)
   Skills: CMOS-related SRAM memory design experience, circuit simulation and optimization, margin analysis, characterization, design validation, including logic simulation and physical verification, layout supervision. Familiarity in scripting languages (UNIX shell, PERL, SKILL). Exposure to Hercules and Calibre Verification tools.
   Position: Design Engineer / Senior Design Engineer

2. Memory Layout (Code: MEML)
   Skills: Memory compiler layout floor planning, layout analysis (power and critical signals), core cell array development, leaf cell layout development, full macro layout integration, hierarchical physical verification, layout review and sign-off and layout production level quality control. Exposure to Hercules and Calibre Verification tools.
   Position: Layout Designer/Senior Layout Designer

3. Standard Cell Design (Code: SCD)
   Skills: Design experience with deep submicron technologies. Very clear with CMOS Digital Basics. Exposure to Circuit Simulation and Optimization. Decent knowledge and understanding of standard cell layout architectures and script writing in UNIX environment. Coding, modifying, or reading DRC/LVS runsets and experience with Hspice OR Spectre simulation desirable. Standard cell library development with leading EDA tools is essential.
   Position: Design Engineer/Senior Design Engineer

4. Standard Cell Layout (Code: SCL)
   Skills: CMOS-related layout design experience with leading CAD tools (Cadence OPUS, Mentor GDT), design validation, including DRC, LVS, ERC, and physical QA. Knowledge of high-speed, design-for-manufacturability, latch-up, ESD, electro-migration, and signal integrity physical design techniques. Familiarity with UNIX and scripting languages (UNIX, shell, PERL, SKILL).
   Position: Layout designer / Senior Layout designer

5. Software Automation (Code: SA)
   Skills: 2-6 years software development skills using object-oriented analysis and design combined with strong software engineering principals. Proficiency in a high level OO language (C++, Java, Python, and/or Scheme). Expertise in circuit simulation (HSPICE, Spectre, etc.) A plus. Relevant experience in generating front-end timing/behavioral models, developing various EDA tools (routing, tiling, gds2 manipulation, LEF, GUI engines, etc.) Familiarity with web based applications.
   Position: Software Engineer/Senior Software Engineer

6. Silicon Technology (Code: ST)
   Skills: 2-6 years experience, familiar with DRC, LVS, LPE device model concepts. Good understanding of semiconductor processes, design rules and device physics. Familiarity with any design entry tools like cadence opus etc. Experience with any physical verification, simulation tools
   Position: Design Engineer

For above Positions rmail your resume.
Note: In the email Subject line Indicate the position code, years of relevant experience and your current company. Example: Subject: SCD, 6 years, Company name

All positions require a minimum BE/B.Tech/M.Tech engineering degree in Electronics, Computer Science with relevant industry experience. Candidates should be self-motivated, quick learners and with excellent communication skills.

Freshers: Electronics / computer science engineers, please send your applications only to this email ID. Indicating your branch, aggregate percentage.