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Displaying 61 To 70   of about 72 Job Advertisements
LSI Logic
, simulation, layout supervision and prototype validation activities. Candidates must demonstrate through understanding of theory and application of Analog/MXS design techniques on deep submicron technologies (90nm, 0.13µm and 0.18µm). Must have experience with commonly used EDA tools for schematic capture
www.lookingforjobs.in/shad.php?file=/20051115/ce96cec6d1f1e983af32f12205007e4c.html
Date : 29-04-06 Location : Dubai.

KPIT Campus Infosystems Limited
/ Account Management, the recent 3 years being in customer engagement and pre-sales role. Involvement in atleast 5 successful embedded/ VLSI projects from pre-sales requirements gathering to delivery and maintenance. Knowledge of VLSI/ EDA Tools and workflow in Digital SoC and Analog/ Mixed Signal is a
www.lookingforjobs.in/shad.php?file=/20051207/9a670a63861433db27df547c019188ed.html
Date : 29-04-06 Location : Japan.

System Level Solutions India Pvt. Ltd.
, FPGA design, IP design, knowledge of verification and EDA tools. Knowledge of Altera tools and protocols like USB Ethernet and PCI will be an added advantage. Freshers need not apply. Jr. Marketing Engineer (Job Code B) Qualification and Experience: B.E. (EC/IC) with 1-3 years exp. in Marketing
www.lookingforjobs.in/shad.php?file=/20051208/4d2da847b0907fb3a75c99d4a70498b6.html
Date : 29-04-06

P N Venugopal And Associates
Stack (CDMA/ UMTS/ GPRS) Wireless MAC (802.11 or 802.16e) Telecom/ Networking (VoIP, Routing, Protocols, Layer 3) Embedded Software (RTOS, VXworks, Linux, Device Drivers) Testing (Telecom, Datacom, Storage) EDA Tools (C++, Perl, Shell Programming) Applicants should have 5-20 years relevant
www.lookingforjobs.in/shad.php?file=/20051217/4391ee19e69b07a7d11e8fe9585883a0.html
Date : 29-04-06 Location : Bangalore, Hyderabad, Delhi.

Virage Logic
Full-Custom backend design methodologies and flows. Front End/EDA : Design and develop various EDA models for memory and logic libraries to enable the seamless integration of Virage Logic IP into multiple SoC design environments. For detailed information on current employment opportunities at Virage
www.lookingforjobs.in/shad.php?file=/20060114/61ab402f1853265f7735e4e2d9ad6991.html
Date : 29-04-06 Location : Noida.

Agilent Technologies
data sources (XML/CSV/OLAP) and GUI development R&D Engineer (Network Assurance) (Job Req # 2007364) Experience in GPRS/UMTS Agilent Engineering Services (AES): AES is part of the Global Infrastructure Organization in the areas of (CAD) EDA/CLS Enterprise Licensing, and Enterprise Software
www.lookingforjobs.in/shad.php?file=/20060201/f7245d9159f8bc8759f99b4e23c002ab.html
Date : 29-04-06 Location : Gurgaon.

Agilent Technologies
data sources (XML/CSV/OLAP) and GUI development R&D Engineer (Network Assurance) (Job Req # 2007364) Experience in GPRS/UMTS Agilent Engineering Services (AES): AES is part of the Global Infrastructure Organization in the areas of (CAD) EDA/CLS Enterprise Licensing, and Enterprise Software
www.lookingforjobs.in/shad.php?file=/20060207/560898c9a2e79ba19af0b16ba3248da1.html
Date : 29-04-06 Location : Gurgaon.

Freescale Semiconductor Inc.
of analog blocks like ADC/DAC, Sigma-Delta, PLLs, High Speed PHYs, High voltage designs, RF. Knowledge of CMOS analog circuit design concepts, understanding of devices and process technology to be able to do complex circuit design, proficiency in use of EDA tools for schematic capture, circuit simulation
www.lookingforjobs.in/shad.php?file=/20060210/3d392f5ca3237842f7998e18049e1d25.html
Date : 29-04-06 Location : Noida, Bangalore.

Trident Techlabs Pvt. Ltd.
Trident Techlabs Pvt. Ltd. Planning for perfection Techlabs an ISO 9001:2000 Certified company is a key player in the field of EDA, Embedded Electronic, Electrical Power Systems and Automation. If you have a passion to take up challenges in a work environment that fosters
www.lookingforjobs.in/shad.php?file=/20060218/6abae2bd1192e1e1cd946d9a4b599e4d.html
Date : 29-04-06 Location : Delhi, Bangalore, Hyderabad, Pune.

ARM Embedded Technologies Private Limited
, modifying, or reading DRC/LVS runsets and experience with Hspice OR Spectre simulation desirable. Standard cell library development with leading EDA tools is essential. Position: Design Engineer/Senior Design Engineer Standard Cell Layout (Code: SCL) Skills: CMOS-related layout design experience
www.lookingforjobs.in/shad.php?file=/20060313/e405f6752547e30a3553c03a23b00e43.html
Date : 29-04-06 Location : Bangalore.